Verilog / VHDL Jobs

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About Verilog / VHDL
Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

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    17 jobs found, pricing in NZD
    altera c5 soc fpga to hpc data transfer 6 days left

    I have 1.25 Mbps data on an avalon-ST interface to be transferred to the HPS then to the ethernet port on DE1-SOC board. The data are on 24 channels of 24bit samples. I need you to explain the work to me in case I need to modify it or change the platform. My project which collects the data is attached. The top-level file is i2s_dsp

    FPGA Verilog / VHDL
    $59 / hr (Avg Bid)
    $59 / hr Avg Bid
    2 bids
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    wireless sensor node protocol 6 days left

    My project require someone knowledgable in the area of wsn. The main Idea would be enhancing a currently existing routing protocol in wireless sensor nodes, the code can be done in any language, I prefer Matlab and or c++ using omnet++ simulator

    C Programming C++ Programming Electrical Engineering Matlab and Mathematica Verilog / VHDL
    $644 (Avg Bid)
    $644 Avg Bid
    7 bids
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    FPGA simple circuit board design 6 days left
    VERIFIED

    Circuit board designer required for FPGA board with the following specifications. PCI-Express Xilinx Kintex 7 FPGA 50a VCCINT power to FPGA JTAG port (Possible option of 2 x DDR3 SODIMM RAM Slots)

    Electrical Engineering Electronics Microcontroller PCB Layout Verilog / VHDL
    $2684 (Avg Bid)
    $2684 Avg Bid
    13 bids
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    Image processing using verilog 6 days left

    I want to do image processing for some of my images its basically a red color segmentation from the image and detect the patterns using verilog..... the image size is 240x240

    Electrical Engineering Engineering FPGA Matlab and Mathematica Verilog / VHDL
    $404 (Avg Bid)
    $404 Avg Bid
    7 bids
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    Program plc 6 days left

    get input from banner hi speed sensor and provide output to air cylinder

    Electrical Engineering Electronics Engineering Microcontroller Verilog / VHDL
    $294 (Avg Bid)
    $294 Avg Bid
    11 bids
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    New Control system Implementation on FPGA using VHDL ... 5 days left

    FPGA based VHDL code of control system device, the design should be handwritten, not generating code. The FPGA design must have the std logic data type of the inputs and the outputs and S-Fixed numbers of the entire control design.

    Electrical Engineering Electronics FPGA Matlab and Mathematica Verilog / VHDL
    $237 (Avg Bid)
    $237 Avg Bid
    10 bids
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    Implementation of Image processing on FPGA 5 days left

    I am currently working on some small project need to implement an image processing on FPGA, which may include patterns detection after red color segmentation and recognizing the detected patterns....the image size is 240x240 which has some patterns covered in red color

    Electrical Engineering Engineering FPGA Matlab and Mathematica Verilog / VHDL
    $153 (Avg Bid)
    $153 Avg Bid
    5 bids
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    Vivado simulation using LVDS interface 5 days left

    This project need to implement the several LVDS interface between Xinix Atix and a sensor buffer This project is completed after simulating transfer (Buffer content ==> FPGA RAM content) This is the testing project, so that, you can get more projects after completing this. If you have experiences, you can complete within a few days. Deliverables: Verilog & buffer frame communication si...

    Verilog / VHDL
    $545 (Avg Bid)
    $545 Avg Bid
    5 bids
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    generate verilig code for quartus ii program 3 days left
    VERIFIED

    I have a de1-soc fpga board ([login to view URL]) for the detail. currently i have difficulty id generating code for image processing for my image. I have a completed matlab code that include the image and filtering kernel. I need the code to run into my fpga board.

    Electronics FPGA Matlab and Mathematica Verilog / VHDL
    $126 (Avg Bid)
    $126 Avg Bid
    3 bids
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    Vhdl Mips pipelined project 2 days left

    Need a vhdl project on mips pipelined processor

    Verilog / VHDL
    $219 (Avg Bid)
    $219 Avg Bid
    8 bids
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    Max10 FPGA <> FT60x <> PC using USB3 and VHDL 1 day left
    VERIFIED

    We're looking for someone with experience is sending data from an FPGA to a PC via a FT601 chip (made by FTDI) and saving the data to a binary file on the PC side.

    C Programming Electronics FPGA Verilog / VHDL
    $57 / hr (Avg Bid)
    $57 / hr Avg Bid
    8 bids
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    Verilog Design 1 day left

    I have one architecture, needs the RTL verilog code for the design to be made and followed by placement and routing to derive the power.

    Electrical Engineering Electronics Engineering FPGA Verilog / VHDL
    $200 (Avg Bid)
    $200 Avg Bid
    10 bids
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    Vivado HLS fixed point code optimization 1 day left
    VERIFIED

    1. Vivado HLS fixed code optimization 2. Introduction of parallelism and pipeling 3. c-simulation, synthesis and RTL-C cosim verification 4. IP generation in Vivado HLS 5. Intergration of IP generated in HLS in Verilog code

    Verilog / VHDL
    $261 (Avg Bid)
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    1 bids
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    Implementation of control system based VHDL on FPGA 11 hours left

    FPGA based VHDL code of control system device, the design should be handwritten, not generating code. The FPGA design must have the std logic data type of the inputs and the outputs and S-Fixed numbers of the entire control design

    Electrical Engineering Electronics FPGA Microcontroller Verilog / VHDL
    $150 (Avg Bid)
    $150 Avg Bid
    7 bids
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    Control system implementation based VHDL on FPGA. 11 hours left

    FPGA based VHDL code of control system device, the design should be handwritten, not generating code. The FPGA design must have the std logic data type of the inputs and the outputs and S-Fixed numbers of the entire control design.

    Electrical Engineering Electronics FPGA Matlab and Mathematica Verilog / VHDL
    $220 (Avg Bid)
    $220 Avg Bid
    8 bids
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    NEXYS 4 DDR - DSP ( citire semnale si prelucrare ) 5 days left
    VERIFIED

    Cu ajutorul placii de dezvoltare Nexys 4 DDR dorim citirea datelor receptionate de o placa ce contine o fotodioda. Semnalele primite sa le afisam si sa le prelucram ulterior cu ajutorul unor algoritmi de filtrare pentru a obtine la final niste date valide.

    FPGA Microcontroller Verilog / VHDL
    $246 (Avg Bid)
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    1 bids
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    Criar sistema para Máquina POS 1 day left

    Preciso de um profissional com experiência em programação para máquinas POS (point of sale) para criar um sistema de emissão de ingressos. Necessário sistema web para gerenciar as vendas. Possibilidade de pagamento na POS via cartão de crédito/débito. Aguardo interessados para combinar.

    C Programming C++ Programming JavaFX Prolog Verilog / VHDL
    $1385 (Avg Bid)
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    5 bids
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