Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

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    30 jobs found, pricing in NZD

    These are the topics of the course::: define the three levels of abstraction used in digital design design digital gates using NMOS, PMOS and CMOS logic families that implement boolean functions define the voltage transfer characteristics of a digital inverter desgin MUXes, latches and flip-flops using CMOS logic design linear feedback shift registers (LFSRs) that produce pseudo-random bit patter...

    $24 / hr (Avg Bid)
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    4 bids
    verilog coding and simulation 6 days left
    VERIFIED

    emulate my current verilog code.

    $220 (Avg Bid)
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    11 bids

    I need bitstream for my card VCU1525 it has 64 GB of ram,need good hash rate. freelancer will deploy bitstream using vivado to my card and i will test its hashing rate and [login to view URL] i need the miner application to. also i need long term support,also write the word VCU in end of bid.

    $1050 (Avg Bid)
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    1 bids

    Signals and spectra Signal transmission and filtering Amplitude modulation Angle modulation Digital transmission of analog signals Probabilidades and random variables Random processes Noise in analog communication systems Optimum detection Information theory and source coding Error control coding

    $154 (Avg Bid)
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    8 bids
    Verilog Coding Task. 4 days left
    VERIFIED

    Hi I am looking for Verilog Coding expert for a task. I will share more details through chat.

    $32 (Avg Bid)
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    3 bids
    computer architecture project 4 days left
    VERIFIED

    must be expert with conceptual computer architecture concepts(eg. amdahl law, isa, mips) will be tested with 1 quick question before I hire you. Question should take under 5 minutes to solve. Must be experienced with computer architecture and MIPS JOB is to create a MIPS calculator. bid if you are ready for the job

    $1599 (Avg Bid)
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    7 bids
    Proteus software simulation 4 days left
    VERIFIED

    Hey there, I want a simulation on Proteus software for a Piezoelectric-based energy harvesting project.

    $42 (Avg Bid)
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    6 bids
    Verilog Coding 3 days left
    VERIFIED

    Hi I am looking for Verilog Coding expert for a task. I will share more details through chat.

    $43 (Avg Bid)
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    4 bids
    vivado xilinx expert needed 3 days left
    VERIFIED

    i want long term employee. if you are expert in verilog, vhdl. please bid here

    $202 (Avg Bid)
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    8 bids
    Verilog Alarm Clock 2 days left
    VERIFIED

    Design the control logic for an alarm clock (for simulation purposes 20ns simulation = 1 minute real time –this can be adjusted somewhat for simulation purposes). a) Use multiple input signals (alarm set input, the snooze, and the alarm time). b) The design will contain one output (Alarm_On). A logic high at the output represents the alarm being “on”. c) An input will be used ...

    $99 (Avg Bid)
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    8 bids
    VLSI PROJECT -- 3 2 days left
    VERIFIED

    Comparison of CMOS, pseudo NMOS and transmission gate logic in terms of power-delay-area. Using cadence virtuoso using AMI 0.6um or TMSC 0.4um

    $196 (Avg Bid)
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    3 bids
    vivado expert needed -- 2 2 days left
    VERIFIED

    i want long term employee. if you are expert in verilog, vhdl. please bid here

    $146 (Avg Bid)
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    2 bids
    vivado expert needed 2 days left
    VERIFIED

    i want long term employee. if you are expert in verilog, vhdl. please bid here

    $6 / hr (Avg Bid)
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    2 bids
    Vhdl project -- 4 2 days left
    VERIFIED

    I need some clarification on vhdl

    $172 (Avg Bid)
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    12 bids

    Want someone who can quickly build an ARINC429 UVM UVC. Very low budget.

    $344 (Avg Bid)
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    3 bids
    VLSI project 2 days left

    about comparison of CMOS, pseudo NMOS and transmission gate logic in term of power delay area

    $144 (Avg Bid)
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    3 bids
    three-phase active rectifier 2 days left
    VERIFIED

    I already have three-phase diode rectifier and I want to make it to three-phase active rectifier on PLECS standalone.

    $111 (Avg Bid)
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    4 bids
    Digital Electronics 2 days left
    VERIFIED

    CMOS logic gates, digital circuit design using Verilog HDL and logic synthesis, clock distribution, digital circuit implementations and verification, digital memory and signalling technologies.

    $111 (Avg Bid)
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    11 bids

    Hy, (10 engineers required) I am running a company, i have team of electrical engineers in different domains. Due to heavy work flow i need to extend my team so i need electrical engineers in different domains (electronic, power and communication). I need someone who can work with me for long term. Please bid if you are expert in your field. Please write 786 at the start of your proposal.

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    24 bids

    More details will be shared via chat

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    2 bids

    Looking for Linux Kernel developers And FPGA developers to port the Mister Project Linux Kernel and U-Boot of DE10 Nano to the Xilinix Ultra96-V2 Zynq UltraScale+ ZU3EG. Once completed we need assistance porting of the existing FPGA cores of Mister Project to the zu3. Mister Project Linux Kernel: [login to view URL] Mister Project U-Boot: [login to view URL] [login to view URL]

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    You have a VHDL code and you need to describe it. I would provide example

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    I need the help of someone who could help me propose and implement an algorithm using constraints programming methods that supports formal verification of digital models that can be used on hardware models in VHDL , verilog, e.t.c, its quite urgent please, your help would be highly appreciated

    $192 (Avg Bid)
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    7 bids
    Vlsi sempile ptoject 8 hours left
    VERIFIED

    I want 3bit cuonter is tow phases .phase 1 is Dane but I want phase 2 is layout in magic

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    We need someone to help with some theoretic & programming questions in MPI Parallel C programming, including cost analysis, running time of the program, etc.

    $38 (Avg Bid)
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    2 bids
    ASIC Verification Engineers 46 days left
    VERIFIED

    Seeking full-time experienced ASIC Verification Engineers for an ongoing project (12 months+) Essential requirements: Knowledge of at least one industry standard protocol like Ethernet, PCIe, MIPI, USB, AMBA or similar. Ability to update testbench components like reference model/SB, drivers and monitors. Team player with excellent interaction skills. Perl/shell scripting is a good to have. ...

    $21 - $34 / hr
    Sealed NDA
    $21 - $34 / hr
    21 bids