I already have a Verilog code for Booth-Encoded Wallace multiplier. it will be very easy to modify it to meet your requirements.
I am an ex-employee at Mentor Graphics. I am coding in Verilog/VHDL since 2008. I am currently TA'ing a digital design course at University of Toronto.
$50 USD in 3 days
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I have worked in FPGA industry for 6 years and have expertise in synthesis , implementation and P& R .
Can analyse the project very well after is implemented