I would like to bid this job because I am really suitable for job description:
First: I am an Electronics engineer who is very familiar with Mathlab/VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird. Also, I participated image processoing project: a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Also,,I implemented the image conpression (wavelet transform).
Especially, I have design some adder following the wallace multiplier so I can send the code in verilog now. These are
• Sklansky adder,
• Ladner-Fischer adder – for the minimum depth case only,
• Brent-Kung adder,
• Kogge-Stone adder,
• Han-Carlson adder – constructed for values k=1 and k=2
Besides, I have a Zedboard from Xilinx to verify the design.
Finally, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers.. Please contact me and let me know if you want any special requirement.