Binh N. Profile

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$30 USD / hour

vietnam

$30 USD / hour

It's currently 9:06 AM here

Joined March 25, 2015

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Binh N.

@hieubinhnguyen

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(0 reviews)

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$30 USD / hour

vietnam

$30 USD / hour

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Design verification engineer, 9+ years experience

I am over 9 years as an design verification engineer. I am fluent in using system verilog and UVM to build verification test bench, making scenario to verify RTL design. I am also strong in debugging using Verdi, simvison tool. I am able to make cshell and python script to support for verification tasks. I have experience with some IP such as USB, UFS/Unipro, VbyOne, MiPi IP

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Experience

Efinix

Aug 2022 - Present

Maintain MiPi IP and fixing RTL code relating to function issue. Using python to generate golden data for FFT IP.

Renesas

Sep 2014 - Aug 2022 (7 years, 11 months)

As a design verification engineer I do most of the relating task including: making test plan, building up verification test bench using system verilog and UVM from crash. I also execute verification for some IPs such as USB, UFS/unipro, VbyOne, MiPi. I able to use python and Cshell to support for my work.