verilog code

Completed Posted 3 years ago Paid on delivery
Completed Paid on delivery

I want to write a verilog code for 16 bit booth encoded wallace tree multiplier. i have 8 bit code for reference.

Verilog / VHDL FPGA Engineering Software Architecture

Project ID: #25896248

About the project

6 proposals Remote project Active 3 years ago

Awarded to:

ShivAgg

hi I have 6+ years of industry experience with verilog vhdl rtl design and fpga prototyping and verification. i can help you with your project. please discuss more details in chat.

₹1350 INR in 2 days
(2 Reviews)
0.5

6 freelancers are bidding on average ₹2254 for this job

kundanvaghela

i have 2+ year experience in design and verification, i have done 25+ project in verilog/VHDL, i will done your project perfectly and on time, i will provide support after completion of project, thanks and regard More

₹1700 INR in 2 days
(12 Reviews)
3.5
lavanyaanjee

Hey, I can try this for you Because I did ma engineering projects in VERILOG. I can try this in case I completed it, I will give it to you and this task will be very useful to ma future to. thanks.

₹1250 INR in 5 days
(1 Review)
0.4
tushartyagi773

I am working in vlsi domain and has good experience in verilog and rtl design. I have previously worked on crc generators and fifo designs. I think I can complete this task. Looking forward to hear back

₹2000 INR in 4 days
(0 Reviews)
0.0
praveenbohra24

i have coded many dadda n Wallace tree multiplier . let me know if I can be of ur help .. have 7+ years of experience in VLSI ..

₹3889 INR in 5 days
(0 Reviews)
0.0