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Develop a CAD tool for RAM mapper

$10-30 CAD

Closed
Posted over 5 years ago

$10-30 CAD

Paid on delivery
You will develop a CAD tool that can read in the “logical RAMs” in each circuit of a benchmark set, and output a set of “physical RAMs” that can implement the logical RAMs for each circuit. Your tool should be able to target FPGAs with up to 3 types of physical RAMs (which may be 3 different block RAMs, or 2 block RAMs and “LUTRAM” created by using a logic block as RAM). Your CAD tool should attempt to find a solution that minimizes the area of the FPGA needed to fit each benchmark circuit.
Project ID: 18130118

About the project

2 proposals
Remote project
Active 5 yrs ago

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2 freelancers are bidding on average $245 CAD for this job
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I can do the job for you. I have experience with verilog, VHDL. The solution will be a C# program that parses input files and produce output files in the format specified in the attached file. it takes one week
$290 CAD in 1 day
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Flag of CANADA
Toronto, Canada
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Member since Nov 10, 2018

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